Software option protects FPGA designs

11th April 2018
Posted By : Mick Elliott
Software option protects FPGA designs

A Security Key Programming software option that allows programming of a 256-bit AES key for Altera Cyclone V FPGAs has been released by Goepel electronic. It activates the design security in the FPGA, thus bitstreams can no longer be analysed. This protects the FPGA design against re-engineering, cloning and copying.

The "Security Key Programming" option enables programming of the 256-bit AES key via JTAG access. In conjunction with a Cipher Block Chaining (CBC) implementation, the highest possible security in the authentication and encryption of the FPGA configuration data is ensured.

The programming method provides the reliability required to accurately program One Time Programmable (OTP) fuses, configured by Altera software.

This is essential because the arming of the security mechanism is an irreversible process. After arming, only properly encoded bitstreams are accepted by the FPGA.

The "Security Key Programming" option is part of the software platform SYSTEM CASCON.

On the hardware side, this functionality is realised through the use of the Embedded JTAG Solutions platform SCANFLEX. This system offers many possibilities in support of a wide range of applications.

These include options for operating the JTAG interface over long distances of up to 4 meters, gang operations or control of multi-TAP / multi-drop targets.

Since both hardware and software support all Embedded System Access (ESA) technologies, they can be combined with other methods such as Boundary Scan Test or Processor Emulation Test.


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