Inspection & Test

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High-magnification inspection systems offer user comfort

High-magnification inspection systems offer user comfort
FSInspection will highlight its high-magnification visual inspection stations in Booth 3720 at the IPC APEX EXPO, scheduled to take place 24th to 26th February 2015, at the San Diego Convention Centre, California. Designed for industrial needs, the series includes the HDMag High-Magnification Visual Inspection Station, X-Mag Machine Vision Station and PKMag 50 Portable Visual Inspection Device.
27th January 2015

Unwanted reflections suppressed for precise 3D AOI

Unwanted reflections suppressed for precise 3D AOI
CyberOptics has announced that it will launch its SQ3000 3D AOI system in Booth 3332 at the IPC APEX EXPO, scheduled to take place 24th to 26th February 2015 at the San Diego Convention Center, California. Alongside the SQ3000 3D AOI, the booth will also feature the CX150i automated conformal coating inspection system and the SE600 premier 3D SPI system.
21st January 2015

Functional test service on parade at IPC APEX EXPO

Functional test service on parade at IPC APEX EXPO
Single- and double-sided flying probe testers will be the centerpiece of ACD’s stand at the IPC APEX EXPO in San Diego (Feb. 24-26). The company’s assembly business model supports high-mix, high-technology assembly from prototypes through low-to-mid volume production to offer its customers confidence in receiving quality, defect free assemblies.
21st January 2015


SPI & AOI systems to be exhibited at NEPCON Japan

SPI & AOI systems to be exhibited at NEPCON Japan
CyberOptics has announced that it will exhibit its latest lineup of SPI and AOI systems at its representative TOYO Corporation’s booth E6-002 at NEPCON Japan, scheduled to take place 14th to 16th January, 2015 at the Tokyo Big Sight.
8th January 2015

Easy-to-use SPI system boasts 6.4TFLOPS

Easy-to-use SPI system boasts 6.4TFLOPS
Vi Technology's Pi (π) SPI system has been purchased by Hunter Technology and installed in its Silicon Valley facility. In a competitive side-by-side evaluation, the Pi was the clear choice for Hunter Technology. This next-gen SPI features ease of programming, ease of maintenance, operator friendliness and automatic threshold settings.
29th December 2014

Thin die tester meets SEMI standard

Thin die tester meets SEMI standard
Nordson DAGE has introduced a new test method for the evaluation of die strength by means of cantilever bending where 3 point bending is not suitable for die with a thickness of less than 50 microns. Die with thickness below 50 microns tend to be very compliant, in fact so much so that it becomes virtually impossible to apply a test load.
11th December 2014

PCB size no problem for automated inspection system

PCB size no problem for automated inspection system
GOEPEL electronics is offering a variant of the inline AOI system AdvancedLine for the inspection of overlength PCBs. The longboard AOI system enables testing of assembled and soldered PCBs with a length of up 1,600mm. An adjustment for even longer PCBs is also possible due to the flexibility of the overall design.
1st December 2014

Process line ID modules provide marking & separation

Process line ID modules provide marking & separation
Designed for automated test lines, the JOT Scanner Unit SCU-439 and JOT Fail Separation Unit FMM-440 modules have been released by JOT Automation. The devices can be used alongside any process equipment that needs product identification data, or where there is a need to mark or separate faulty products post-processing.
26th November 2014

SPI results connect to OS in real-time

PARMI and Aegis Software have announced the development of the xLink adapter to enable real-time connectivity of SPI results to Aegis’ FactoryLogix Manufacturing OSs. With real-time data integration, manufacturers immediately can identify SPI defects and take corrective actions to improve PCB yield.
20th November 2014

Test chips allow pre-production thermal engineering

Test chips allow pre-production thermal engineering
Thermal Test Chips (TTCs) designed by JVD can be used to save time and money in the design and thermal management of ASICs and ASSPs, by allowing thermal engineering of components prior to investment in the expensive silicon required for production. With smaller, more powerful, faster devices thermal management is an ever-increasing concern for designers.
19th November 2014


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