Model libraries extend FPGA test functions

25th August 2016
Posted By : Mick Elliott
Model libraries extend FPGA test functions

The availability of ChipVORX model libraries for Bit Error Rate Test (BERT) using SoC FPGAs of the Altera Arria V series to support embedded test and embedded programming has been extended by Goepel electronic. ChipVORX is a technology for universal control of Chip Embedded Instruments via JTAG port.

The special ChipVORX models are modular IP (Intellectual Properties), which contain all relevant access information for the target FPGA and are part of a comprehensive IP library.

Thus, the user can select the target FPGA and then enable the desired test or programming function during project development.

Fast Flash programming, RAM Access tests and universal clock frequency measurement as well as Bit Error Rate Tests (BERT) can be performed without special FPGA knowledge required of the user. By design, with integrated test electronics no needles or probes are necessary for contacting the UUT.

Application settings for the FPGA images (including the connection between IP and pin) are performed automatically and without FPGA synthesis.

Parameters for functions like Bit Error Rate Test and frequency measurement are interactively set via control panels and become operative immediately.


You must be logged in to comment

Write a comment

No comments




Sign up to view our publications

Sign up

Sign up to view our downloads

Sign up

European Microwave Week 2018
23rd September 2018
Spain Ifema Feria De Madrid
Connected World Summit 2018
25th September 2018
United Kingdom Printworks, London
IoT Solutions World Congress 2018
16th October 2018
Spain Barcelona
Engineering Design Show 2018
17th October 2018
United Kingdom Ricoh Arena, Coventry
Maintec 2018
6th November 2018
United Kingdom NEC, Birmingham