Design

IC validator certified for UMC's 28nm process

23rd April 2014
Staff Reporter
0

Synopsys and United Microelectronics Corporation have announced that UMC has certified Synopsys' IC Validator product for physical verification on the company's 28nm process. Joint customers can now reap the benefits of IC Validator for In-Design with confidence that the tool and its runsets have been fully qualified by UMC for accuracy and completeness.

"UMC is committed to providing the latest design support resources to help streamline our customers' path to silicon," said Steve Wang, vice president of IP Development & Design Support Division at UMC.  "This joint development with Synopsys for IC Validator provides our customers with access to a highly reliable verification tool when designing on UMC's latest 28-nanometer manufacturing technology. We look forward to future collaborative milestones with Synopsys to introduce solutions that will further benefit our mutual customers."

Advances in process technology have placed exponentially growing demands on physical verification tools to check many more design rules that are also becoming much more complex. This evolution has created intense interest among IC designers for the latest and most capable physical verification tools that can address these new challenges. IC Validator is a comprehensive solution for all physical verification tasks, including DRC, LVS, electrical rule checking (ERC) and metal fill insertion. Its modern architecture and excellent multi-core scalability make IC Validator the signoff tool of choice for a growing number of customers from those doing small analog designs to customers working on the most advanced digital chip designs in the world.

Synopsys has collaborated with UMC to deliver IC Validator support for design verification at the 65-nm, 55-nm and 40-nm nodes and is now extending this to the latest 28-nm technology. UMC's 28-nm technology serves applications that require the highest performance with the lowest power leakage. It is based on technology that includes a poly/oxynitride process with gate-last, high-K metal gates to provide excellent performance. The High-performance Low Power (HLP) option delivers a 20 percent performance enhancement over competitive poly/SiON processes and is ideal for portable applications and consumer electronics, while the High Performance for Mobile (HPM) option is ideal for speed-intensive and power sensitive products. Several UMC customer ICs are in volume production using UMC's 28-nm process technology.

"We are committed to providing IC Validator customers access to the broadest possible selection of foundry processes," said Bijan Kiani vice president of product marketing, Design Group at Synopsys. "We have dedicated teams of technologists working jointly with UMC and other leading foundries to deliver fast and reliable verification solutions to our joint customers. We look forward to further cooperation with UMC as we work together on solutions for the next generation of manufacturing technologies."

IC Validator technology files for design rule checking (DRC) and layout vs. schematic (LVS) netlist checking are now available for customer download from UMC's foundry service portal.

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